Author: Erik Nordin
E-Mail: erik.nordin@mailbox.swipnet.se
Version: 1.00
Copyright (c) by Erik Nordin 28/9, 5/11 1995, 1996
--------------------
1 VSS 8 DB1
2 VDD 9 DB2
3 Vo_ 10 DB3
4 D/I_ 11 DB4
5 R/W 12 DB5
6 E 13 DB6
7 DB0 14 DB7
--------------------
RS input register select signal
0= instruction register (then writing)
busy flag and address counter (then reading)
1= data register (then writing and reading)
_
R/W input readwrite select signal
0 = writing
1 = reading
E input operation (data read/write) enable signal
DB4-7 inp/out high order lines data bus with three state
bidirectional function for use in data transactions
with the MPU, DB7 may also be used to check the busy flag
DB0-3 inp/out high order lines data bus with three state
bidirectional function for use in data transactions
with the MPU, these lines are not used when interfacing with a
4bit microprocessor
VDD,VSS power VDD = +5V VSS = gnd
Vo contrast adjustment voltage
RS R/W Operation
0 0 write to instruction register, and execute internal
operation (clear display,etc)
0 1 read busy flag (DB7) and address counter (DB0-DB6)
1 0 write to data register, and execute internal
operation (DD RAM - DR or CG RAM -DR)
1 1 read data register, and execute internal operation
(DD RAM - DR or CG RAM - DR)
_ _
function D/I R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
-------- | | | | | | | | | |
execution time | | | | | | | | | |
description | | | | | | | | | |
-------------------------------------------------------------------------------------
1 clear display 0 0 0 0 0 0 0 0 0 1
1.64ms
clears all display and returns the cursor to the home position (adr0)
2 return home 0 0 0 0 0 0 0 0 1 *
1.64ms
returns the cursor to the home position (adr0). Also returns the display
being shifted to the original position DD RAM contents remain unchanged.
3 entry mode set 0 0 0 0 0 0 0 1 I/D S
40us
sets the cursor move direction and specifies or not to shift the display.
These operations are performed during data write and read
4 display ON/OFF 0 0 0 0 0 0 1 D C B
40us
sete ON/OFF all display (D), cursor control ON/OFF (C),and blink of
cursor position character (B)
5 cursor and 0 0 0 0 0 1 S/C R/L * *
40us
moves the cursor and shift the display display shift without
changing DD RAM contents
6 fundtion set 0 0 0 0 1 DL N F * *
40us
sets interface data length (DL) number of display lines (N) and
character font (F)
7 set CG RAM 0 0 0 1 ( ACG )
40us
sets the CG RAM address.DD RAM data address is sent and recives
after this setting
8 set DD RAM 0 0 1 ( ADD )
40us
sets DD RAM address.DD RAM data is address sent and recived after this setting
9 read busy flag 0 1 BF ( AC )
0us
reads busy flag (BF) indicating & address internal operation is being performed
and reads address counter contents
10 write data 1 0 ( write data )
40us
writes data into DD RAM or CG RAM to CG or DD RAM
11 read data 1 1 ( read data )
40us
reads data from DD RAM or CG RAM from CG or DD RAM
-------------------------------------------------------------------------------------
I/D = 1: increment (+1) I/D = 0: decrement(-1) DD RAM: display data RAM
S = 1: accompanies display shift CG RAM: character generator RAM
S/C = 1: display shift S/C=0: cursor move ACG : CG RAM address
R/L = 1: shift to the right ADD : DD RAM address
R/L = 0: shift to the left corresponds to cursor address
D/L = 1: 8bits DL = 0: 4bits AC : address counter used for both
N = 1: 2lines N = 0: 1 line of DD and CG RAM address
F = 1: 5810dots F= 0: 587 dots
BF = 1: internally operating
BF = 0: can accept instruction
-------------------------------------------------------------------------------------
Data RAM = 80 chr
________________________________________________________________
1st line I 00 I 01 I 02 I 03 I 04 I .. I 26 I 27 HEX I DD RAM address I
----------------------------------------------------------------
2st line I 40 I 41 I 42 I 43 I 44 I .. I 66 I 67 HEX I address counter I
----------------------------------------------------------------
I 1 I 2 I 3 I 4 I 5 I .. I 39 I 40 DEC I display position I
----------------------------------------------------------------
8-bit interface (example)
RS ______________________________________________________
_ __________________________
R/W ___________/ \_______________
___ ___ ___ ___ ___
E _______/ \___/ \___/ \___/ \___/ \__________
___________________ ready for data_______
Operating __________I internal oprationI_____________I
status ____ _____ ___________________ __ ____ ________
DB7 ____><_____><__/ \___/ \____\__/__><____><________
data I busy I busy I not I data
I I I busy I
write I check I check I check I write
instruction I busy I busy I busy I instruction
I flag I flag I flag I
4-bit interface (example)
RS _______________________________________________________________
_ __________________________
R/W ____________________/ \_______________
_____ ____ ___ __ ___ ___ ____ ____
E _____/ \/ \____/ \/ \____/ \/ \____/ \/ \__
_________________ ___
Operating __________________Iinternal oprat I___ready for data________I
status ____ _____ _____ __________ ___ ____ __ ____ ____ _
DB7 ____><_IR7_><_IR3_><__/ \AC3><___\___/_AC3><__><_D7_><_D3_><_
data I busy I not I data
I I busy I
write I check I check I write
instruction I busy I busy I instruction
I flag I flag I
4-BIT TRANSFER
___________________
RS _________________________________________/
_ ____________________________________________
R/W ________________/
___ ___ ___ ___ ___ ___
E ______/ \__/ \______/ \__/ \________/ \__/ \______
____ _____ _____ ___ _____ _____ _____ _____ _____ _
DB7 ____><_IR7_><_IR3_><___><_BF__><_AC3_><_____><_DR7_><_DR3_><_
____ _____ _____ ___ _____ _____ _____ _____ _____ _
DB6 ____><_IR6_><_IR2_><___><_AC6_><_AC2_><_____><_DR6_><_DR2_><_
____ _____ _____ ___ _____ _____ _____ _____ _____ _
DB5 ____><_IR5_><_IR1_><___><_AC5_><_AC1_><_____><_DR5_><_DR1_><_
____ _____ _____ ___ _____ _____ _____ _____ _____ _
DB4 ____><_IR4_><_IR0_><___><_AC4_><_AC0_><_____><_DR4_><_DR0_><_
write to | read busy flag | read data
instruction | (BF) and address | register (DR)
register (IR) | counter (AC) |
_________________________________________________
| | min | max |
| enable cycle time | 1000 | ns |
| enable pulse width (high) | 450 | ns |
| setup time (RS,R/W) -E | 140 | ns |
| data delay time | | 320 ns |
|___________________________|_______|___________|
5V ______________ VDD
| LCD UNIT
| GND---- VSS
\
/<-------- Vo
\ 5K
/
____|
GND to (-1.5V)
(S type = -5V
nr instruction display operation
1 power ON (internal reset | | the LCD is initialized. no display
circuit is trigged | |
2 function set | | set for 8-bit data transfer and
DD R/W DB7-DB0 | | address type b (dual line)
00 00 11 10 **
3 display ON/OFF |_ | turn on the display and cursor. After
00 00 00 11 10 | | initialization. the DD RAM is filled
with the "space" code
4 entry mode set |_ | set the LCD unit to increment the address
00 00 00 01 10 | | counter and shift the cursor to the right
after each data transaction
the display does not shift
5 CG RAM/DD RAM |S_ | write "S" into the DD RAM. The cursor
data write | | shifts to the right
10 01 01 00 11
6 .
.
.
.
7 CG RAM/DD RAM |SHARP LCD UNIT | write "space" into DD RAM
data write | |
10 00 10 00 00
8 DD RAM address set |SHARP LCD UNIT | set DD RAM address to the first
00 11 00 00 00 | | position of the second line
9 CG RAM/DD RAM |SHARP LCD UNIT | write "L" into the DD RAM
10 01 00 11 00 |L |
10 .
.
.
.
11 CG RAM/DD RAM |SHARP LCD UNIT | write "A" into DD RAM
data write |LM16251:16CHA |
10 01 00 00 01
12 entry mode set |SHARP LCD UNIT | set the display to shift after
00 00 00 01 11 |LM16251:16CHA | each data write
13 CG RAM/DD RAM |SHARP LCD UNIT | write "R" into the DD RAM. Both
data write |M16251:16CHAR | lines shift to the left ?
10 01 01 00 10
14 .
.
.
.
15 display/cursor home |SHARP LCD UNIT | restore the display and cursor
00 00 00 00 10 |LM16251:16CHAR | to the their initial position
nr instruction display operation
1 power ON (internal reset | | the LCD is initialized. no display
circuit is trigged | |
2 function set | | set for 4-bit data. This instruction is
RS R/W DB7-DB4 | | transfered in a single operation since
0 0 0 0 1 0 up to this point the LCD unit is in the 8bit mode
3 function set | | set for 4-bit data transfer. From this
RS R/W DB7-DB4 | | point on, data is transferred in two operations
0 0 0 0 1 0
0 0 1 0 * *
4 display ON/OFF |_ | turn on the display and cursor. After
0 0 0 0 0 0 | | initialization. the DD RAM is filled
0 0 1 1 1 0 with the "space" code
5 entry mode set |_ | set the LCD unit to increment the address
0 0 0 0 0 0 | | counter and shift the cursor to the right
0 0 0 1 1 0 after each data transaction
the display does not shift
6 CG RAM/DD RAM |S_ | write "S" into the DD RAM. The cursor
data write | | shifts to the right
1 0 0 1 0 1
1 0 0 0 1 1
.
.
.
The rest it's just like the 8bit mode
THE DISPLAY CAN HAVE 8 HOMEBUILT CHARACTER...
they have ASCII code 0-7
character pattern for 5*7 font
caracter code | CG RAM address | character pattern |
DD RAM data | | (CG RAM data) |
7 6 5 4 3 2 1 0 | 5 4 3 2 1 0 | 7 6 5 4 3 2 1 0 |
---------------------------------------------------------
0 0 0 0 * 0 0 0 | 0 0 0 | * * * 1 1 1 1 0
| 0 0 1 | 1 0 0 0 1
| 0 1 0 | 1 0 0 0 1 sample character
| 0 0 0 0 1 1 | 1 1 1 1 0 pattern (1)
| 1 0 0 | 1 0 1 0 0
| 1 0 1 | 1 0 0 1 0
| 1 1 0 | 1 0 0 0 1
| 1 1 1 |* * * 0 0 0 0 0 cursor position
_________________________________________________________
0 0 0 0 * 0 0 1 | 0 0 0 | * * * 1 0 0 0 1
| 0 0 1 | 0 1 0 1 0
| 0 1 0 | 1 1 1 1 1
| 0 0 1 0 1 1 | 0 0 1 0 0 sample character
| 1 0 0 | 1 1 1 1 1 pattern (2)
| 1 0 1 | 0 0 1 0 0
| 1 1 0 | 0 0 1 0 0
| 1 1 1 |* * * 0 0 0 0 0
----------------------------------------------------------
.
.
.
0 0 0 0 * 1 1 1
1 line display = 43,47,4B,4F
2 lines = 23,27,63,67
if HD44780A have a "R" in the upper right corner the defects have been corrected.
______
| R|
\____|